The present invention generally relates to sorting devices, and more particularly to a sorting device which can perform a sorting operation for a plurality of reference data.
Image synthesizing devices are widely used for applications such as a 3-D video game machine, a machine for simulation of air planes and various vehicles, a computer graphic machine, a CAD machine or the like. The image synthesizing devices output various image signals to a CRT display in accordance with image information supplied by external devices. The image synthesizing devices can synthesize not only a two dimensional image but also a three dimensional stereoscopic image.
In order to synthesize the 3-D image in real time, it is necessary to perform a sorting of 3-D data of polygons for each frame in accordance with coordinate values in a depth direction, that is, according to the Z coordinate of the reference data. As a conventional sorting device, a sorting device disclosed in Japanese Laid-Open Patent Application No. 2-224018 is known to the art. This sorting device has three memories, a first buffer memory, a last buffer memory and a chain buffer memory. The sorting device further includes a flag memory so as to increase sorting speed.
In the above-mentioned conventional sorting device, as many as three buffer memories are used, which results in increasing of the manufacturing cost of the sorting device.
Additionally, since bit data having a flag bit is detected by searching for a flag, bit by bit, upon writing data read out from the flag memory to a shift register, data having no flag bit must be read out. This results in performing unnecessary operations, and thereby it is difficult to increase the sorting speed.